1. Field of the Invention
The invention relates generally to a data processing system. More particularly, it relates to saving and restoring processor register values and allocating and deallocating stack memory.
2. Background Art
Two well-known operations performed by computer systems are the storing and retrieving of items on a stack. Stackable items include general purpose register contents; e.g., data and addresses. These operations (also referred to as xe2x80x9cpushxe2x80x9d and xe2x80x9cpopxe2x80x9d operations) are typically used to facilitate the entry to and exit from subroutines. That portion of a stack created for a particular subroutine is referred to as a xe2x80x9cstack frame.xe2x80x9d In programmable devices (such as microprocessors), dedicated instructions may be used to carry out these operations.
It is desired to enhance the utility of stack storing and/or retrieving operations by providing additional functionality associated therewith. Such functionality, when added to instructions for carrying out stack operations, make it possible to write more compact application programs since such instructions encode multiple functions.
The present invention provides methods and means for saving and restoring processor registers and allocating and deallocating a stack frame. In one embodiment, a first field of a save instruction encodes whether a value in a register of a processor is saved as an argument value or a static value. A second field of the save instruction encodes a size of a stack frame created during execution of the save instruction. An argument value is saved in a calling program""s stack frame. A static value is saved in a called program""s stack frame. A restore instruction is used to restore a static value and deallocate the stack frame. The save and restore instructions may be executed using any programmable device, including a single instruction set architecture processor or a multi-instruction set architecture processor. The functionality of such instructions may be achieved through software, hardware or a combination of both.
In another embodiment, a 16-bit instruction according to the invention comprises at least five fields. These five fields are an instruction opcode field, a 1-bit return address register field, a 1-bit first static register field, a 1-bit second static register field, and a 4-bit frame-size field. This instruction can be executed as a single 16-bit instruction or executed in combination with a 16-bit instruction extension. An instruction extension comprises at least four fields. These four fields are an extend instruction opcode field, a 3-bit additional static registers field, a second 4-bit frame-size field, and a 4-bit arguments register field. The 3-bit additional static registers field allows the values in up to seven addition registers to be saved and restored as static values.
Features of the invention allow the invention to be implemented, for example, as a method for encoding an instruction, as a processor core, as a mapper, as a decoder, and/or as a computer program.
Further features and advantages of the present invention, as well as the structure and operation of various embodiments of the present invention, are described in detail below with reference to the accompanying drawings.